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object VerilogLexerSyntaxHighlighter

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  2. final def ##: Int
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  4. val VERILOG_BLOCK_COMMENT: TextAttributesKey
  5. val VERILOG_COMMA: TextAttributesKey
  6. val VERILOG_DIRECTIVE: TextAttributesKey
  7. val VERILOG_DOLLAR_IDENTIFIER: TextAttributesKey
  8. val VERILOG_IDENTIFIER: TextAttributesKey
  9. val VERILOG_KEYWORD: TextAttributesKey
  10. val VERILOG_LINE_COMMENT: TextAttributesKey
  11. val VERILOG_MODULE_IDENTIFIER: TextAttributesKey
  12. val VERILOG_MODULE_INSTANTIATION: TextAttributesKey
  13. val VERILOG_NUMBER: TextAttributesKey
  14. val VERILOG_PORT_INOUT: TextAttributesKey
  15. val VERILOG_PORT_INPUT: TextAttributesKey
  16. val VERILOG_PORT_OUTPUT: TextAttributesKey
  17. val VERILOG_PORT_OUTPUT_REG: TextAttributesKey
  18. val VERILOG_SEMICOLON: TextAttributesKey
  19. val VERILOG_SIGNAL_NET: TextAttributesKey
  20. val VERILOG_SIGNAL_PARAMETER: TextAttributesKey
  21. val VERILOG_SIGNAL_REG: TextAttributesKey
  22. val VERILOG_STRING: TextAttributesKey
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